IS62LV12816BLL

Features: • High-speed access time: 55, 70, 100 ns• CMOS low power operation 120 mW (typical) operating 6 W (typical) CMOS standby• TTL compatible interface levels• Single 2.7V-3.45V VCC power supply• Fully static operation: no clock or refresh required• Three s...

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IS62LV12816BLL Picture
SeekIC No. : 004379262 Detail

IS62LV12816BLL: Features: • High-speed access time: 55, 70, 100 ns• CMOS low power operation 120 mW (typical) operating 6 W (typical) CMOS standby• TTL compatible interface levels• Single 2....

floor Price/Ceiling Price

Part Number:
IS62LV12816BLL
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/2

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Product Details

Description



Features:

• High-speed access time: 55, 70, 100 ns
• CMOS low power operation
120 mW (typical) operating
6 W (typical) CMOS standby
• TTL compatible interface levels
• Single 2.7V-3.45V VCC power supply
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
   48-pin mini BGA (6mm x 8mm)



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VTERW Terminal Voltage with Respect to GND 0.5 to Vcc+0.5 V
TBIAS Temperature Under Bias 40 to +85
Vcc Vcc Related to GND 0.3 to +3.6 V
Tstg Storage Temperature 65 to +150
PT Power Dissipation 1.0 W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.



Description

The ISSI IS62LV12816BLL is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. IS62LV12816BLL is fabricated using ISSI's high-performance CMOS technology. This IS62LV12816BLL highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.

When CE is HIGH (deselected) or when CE is low and both LB and UB are HIGH, the IS62LV12816BLL assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS62LV12816BLL is packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA (6mm x 8mm).




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