IS61WV3216BLL

Features:

• High-speed access time:
12 ns: 3.3V + 10%
15 ns: 2.5V-3.6V
• CMOS low power operation:
50 mW (typical) operating
25 µW (typical) standby
• TTL compatible interface levels
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Automotive Temperature Available
• Lead-free available





Pinout






Specifications

Symbol	Parameter	Value	Unit
VTERM	Terminal Voltage with Respect to GND	0.5 to VDD+0.5	V
TSTG	Storage Temperature	65 to +150
PT	Power Dissipation	1.5	W
VDD	VDD Related to GND	-0.2 to +3.9	V

Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.




Description

The ISSI IS61/64WV3216BLL is a high-speed, 524,288-bit static RAM organized as 32,768 words by 16 bits. IS61/64WV3216BLL is fabricated using ISSI's high-performance CMOS technology. This IS61/64WV3216BLL highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12ns (3.3V + 10%) and 15ns (2.5V-3.6V) with low power consumption.

WhenCE is HIGH (deselected), the IS61/64WV3216BLL assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs,CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS61/64WV3216BLL is packaged in the JEDEC standard 44-pin TSOP-II, and 48-pin mini BGA (6mm x 8mm).