IS61WV12816BLL

Features: • High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V-3.6V• Operating Current: 25mA (typ.)• Stand by Current: 400A(typ.)• TTL and CMOS compatible interface levels• Fully static operation: no clock or refresh required• Three state outputs• Data ...

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IS61WV12816BLL Picture
SeekIC No. : 004379242 Detail

IS61WV12816BLL: Features: • High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V-3.6V• Operating Current: 25mA (typ.)• Stand by Current: 400A(typ.)• TTL and CMOS compatible interface levels...

floor Price/Ceiling Price

Part Number:
IS61WV12816BLL
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• High-speed access time:
   12 ns: 3.3V + 10%
   15 ns: 2.5V-3.6V
• Operating Current: 25mA (typ.)
• Stand by Current: 400A(typ.)
• TTL and CMOS compatible interface levels
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Industrial and Automotive temperatures available
• Lead-free available



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VDD Power Supply Voltage Relative to GND 0.5 to 4.0V V
VTERM Terminal Voltage with Respect to GND 0.5 to VDD + 0.5 V
TSTG Storage Temperature 65 to + 150
PT Power Dissipation 1.0 W

Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.



Description

The ISSI IS61WV12816BLL and IS64WV12816BLL are high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. They are fabricated using ISSI's highperformance CMOS technology. This IS61WV12816BLL highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12 ns with low power consumption.

When CE is HIGH (deselected), the IS61WV12816BLL assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS61WV12816BLL and IS64WV12816BLL are packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pinmini BGA (6mm x 8mm).




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