Features: ·High-speed access times: 8, 10, 20 ns·High-performance, low-power CMOS process·Multiple center power and ground pins for greater noise immunity·Easy memory expansion with CE and OE options·CE power-down·Fully static operation: no clock or refresh required·TTL compatible inputs and outpu...
IS61WV102416ALL: Features: ·High-speed access times: 8, 10, 20 ns·High-performance, low-power CMOS process·Multiple center power and ground pins for greater noise immunity·Easy memory expansion with CE and OE option...
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Features: • Internal self-timed write cycle• Individual Byte Write Control and Global ...
Features: • Internal self-timed write cycle• Individual Byte Write Control and Global ...
Features: • Internal self-timed write cycle• Individual Byte Write Control and Global ...
Symbol |
Parameter |
Value |
Unit |
VTERM |
Terminal Voltage with Respect to GND |
-0.5 to VDD + 0.5 |
V |
VDD |
VDD Relates to GND |
-0.3 to 4. |
V |
TSTG |
Storage Temperature |
-0.3 to 4. |
|
PT |
Power Dissipation |
1.0 |
W |
Notes:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The ISSI IS61WV102416ALL/BLL and IS64WV102416BLL are high-speed, 16M-bit static RAMs organized as 1024K words by 16 bits. IS61WV102416ALL/BLL is fabricated using ISSI's high-performance CMOS technology. This IS61WV102416ALL/BLL highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.
When CE is HIGH (deselected), the IS61WV102416ALL/BLL assumes a standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.
The IS61WV102416ALL/BLL is packaged in the JEDEC standard 48-pin TSOP Type I and 48-pin Mini BGA (9mm x 11mm).