Features: • High-speed access time:- 7, 8, 10, 12, and 15 ns• CMOS low power operation• Low stand-by power:- Less than 5 mA (typ.) CMOS stand-by• TTL compatible interface levels• Single 3.3V power supply• Fully static operation: no clock or refresh required̶...
IS61LV25616: Features: • High-speed access time:- 7, 8, 10, 12, and 15 ns• CMOS low power operation• Low stand-by power:- Less than 5 mA (typ.) CMOS stand-by• TTL compatible interface lev...
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Features: • Internal self-timed write cycle• Individual Byte Write Control and Global ...
Features: • Internal self-timed write cycle• Individual Byte Write Control and Global ...
Features: • Internal self-timed write cycle• Individual Byte Write Control and Global ...
Symbol | Parameter | Value | Unit |
VTERM | Terminal Voltage with Respect to GND | 0.5 to Vcc+0.5 | V |
TBIAS | Temperature Under Bias | 45 to +90 | °C |
VCC | Vcc Related to GND | 0.3 to +4.0 | V |
TSTG | Storage Temperature | 65 to +150 | °C |
PT | Power Dissipation | 1.0 | W |
The ISSI IS61LV25616 is a high-speed, 4,194,304-bit static RAM organized as 262,144 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.
When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory.A
data byte allows Upper Byte (UB) and Lower Byte (LB) access.
The IS61LV25616 is packaged in the JEDEC standard44-pin 400-mil SOJ, 44-pin TSOP Type II, 44-pin LQFP and48-pin Mini BGA (8mm x 10mm).