IS61C64AH

Features: • High-speed access time: 15, 20, 25 ns• Automatic power-down when chip is deselected• CMOS low power operation - 450 mW (typical) operating - 250 W (typical) standby• TTL compatible interface levels• Single 5V power supply• Fully static operation: no ...

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SeekIC No. : 004379132 Detail

IS61C64AH: Features: • High-speed access time: 15, 20, 25 ns• Automatic power-down when chip is deselected• CMOS low power operation - 450 mW (typical) operating - 250 W (typical) standbyR...

floor Price/Ceiling Price

Part Number:
IS61C64AH
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

• High-speed access time: 15, 20, 25 ns
• Automatic power-down when chip is deselected
• CMOS low power operation - 450 mW (typical) operating - 250 W (typical) standby
• TTL compatible interface levels
• Single 5V power supply
• Fully static operation: no clock or refresh required
• Three state outputs
• Two Chip Enables (CE1 and CE2) for simple memory expansion



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VTERM
Terminal Voltage with Respect to GND
0.5 to +7.0
V
TBIAS
Temperature Under Bias
55 to +125
°C
TSTG
Storage Temperature
65 to +150
°C
PT
Power Dissipation
1.0
W
IOUT
DC Output Current (LOW)
20
mA

Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.




Description

The ICSI IS61C64AH is a very high-speed, low power, 8192-word by 8-bit static RAM. It is fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 15 ns with low power consumption.

When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 W (typical) with CMOS input levels.

Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS61C64AH is packaged in the JEDEC standard 28-pin, 300mil SOJ and 330mil SOP.




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