Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 512 cycles /8 ms• Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden• Single power supply: 5V ± 10% (IS41C16256) 3.3V ± 10% (IS41LV16256)...
IS41C16256: Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 512 cycles /8 ms• Refresh Mode: RAS-Only, CAS-b...
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Features: • TTL compatible inputs and outputs; tristate I/O• Refresh Interval: - Auto ...
Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and ...
Features: • TTL compatible inputs and outputs; tristate I/O• Refresh Interval: - 1,024...
Symbol | Parameters |
Rating |
Unit |
VT | Voltage on Any Pin Relative to GND 5V 3.3V |
1.0 to +7.0 0.5 to +4.6 |
V |
VCC | Supply Voltage 5V 3.3V |
1.0 to +7.0 0.5 to +4.6 |
V |
IOUT | Output Current |
50 |
mA |
PD | Power Dissipation |
1 |
W |
TA | Commercial Operation Temperature Industrial Operationg Temperature |
0 to +70 40 to +85 |
|
TSTG | Storage Temperature |
55 to +125 |
The ICSI IS41C16256 and IS41LV16256 is a 262,144 x 16- bit high-performance CMOS Dynamic Random Access Memories. The IS41C16256 offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41C16256 ideal for use in 16-, 32-bit wide data bus systems.
These features make the IS41C16256and IS41LV16256 ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
The IS41C16256 is packaged in a 40-pin 400mil SOJ and 400mil TSOP-2.