IRS4427

Features: · Gate drive supply range from 6 V to 20 V· CMOS Schmitt-triggered inputs· Matched propagation delay for both channels· Outputs out of phase with inputs (IRS4426)· Outputs in phase with inputs (IRS4427)· OutputA out of phase with inputA and outputB in phase with inputB (IRS4428)· RoHS co...

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SeekIC No. : 004378772 Detail

IRS4427: Features: · Gate drive supply range from 6 V to 20 V· CMOS Schmitt-triggered inputs· Matched propagation delay for both channels· Outputs out of phase with inputs (IRS4426)· Outputs in phase with in...

floor Price/Ceiling Price

Part Number:
IRS4427
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

· Gate drive supply range from 6 V to 20 V
· CMOS Schmitt-triggered inputs
· Matched propagation delay for both channels
· Outputs out of phase with inputs (IRS4426)
· Outputs in phase with inputs (IRS4427)
· OutputA out of phase with inputA and outputB in phase with inputB (IRS4428)
· RoHS compliant



Pinout

  Connection Diagram


Specifications

Symbol
Definition
Min.
Max.
Units
VS
Fixed supply voltage
-0.3
20 (Note 1)
V
VO
Output voltage
-0.3
VS + 0.3
VIN
Logic input voltage
-0.3
VS + 0.3
PD
Package power dissipation @ TA +25 8 Lead PDIP)
-
1.0
W
(8 lead SOIC)
-
0.625
RthJA
Thermal resistance, junction to ambient 8 Lead PDIP)
-
125
/W
(8 lead SOIC)
-
200
TJ
Junction temperature
-
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
-
300
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.


Description

The IRS4426/IRS4427/IRS4428 are low voltage, high speed power MOSFET and IGBT driver. Proprietary latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays between two channels are matched.




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