Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A• High Noise Immunity Characteristic of CMOS DevicesPinoutSpecifications Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced t...
IN74HC75A: Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A• High Noise Immunity Characteristic of CMOS Dev...
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Symbol | Parameter | Value | Unit |
VCC | DC Supply Voltage (Referenced to GND) | -0.5 to +7.0 | V |
VIN | DC Input Voltage (Referenced to GND) | -1.5 to VCC +1.5 | V |
VOUT | DC Output Voltage (Referenced to GND) | -0.5 to VCC +0.5 | V |
IIN | DC Input Current, per Pin | ±20 | mA |
IOUT | DC Output Sink/Source Current, per Pin | ±25 | mA |
ICC | DC Supply Current, VCC and GND Pins | ±50 | mA |
PD | Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ |
750 500 |
mW |
Tstg | Storage Temperature | -65 to +150 | |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 |
The IN74HC75A is identical in pinout to the LS/ALS75. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
This IN74HC75A consists of two independent 2-bit transparent latches and can be used as temporary storage for binary information between processing units and input/output or indicator units. Each latch stores the input data while Latch Enable is at a logic low. The outputs follow the data inputs when Latch Enable is at a logic high.