IN74HC652A

Features: `Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 2.0 to 6.0 V`Low Input Current: 1.0 A `High Noise Immunity Characteristic of CMOS Devices PinoutSpecifications Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0...

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SeekIC No. : 004375112 Detail

IN74HC652A: Features: `Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 2.0 to 6.0 V`Low Input Current: 1.0 A `High Noise Immunity Characteristic of CMOS Devices PinoutSpecifications ...

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Part Number:
IN74HC652A
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

`Outputs Directly Interface to CMOS, NMOS, and TTL  
`Operating Voltage Range: 2.0 to 6.0 V  
`Low Input Current: 1.0 A  
`High Noise Immunity Characteristic of CMOS Devices



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) -1.5to VCC +1.5
V
VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5
V
IIN DC Input Current, per Pin ±20 mA
IOUT DC Output Sink/Source Current, per Pin ±35 mA
ICC DC Supply Current, V and GND Pins ±75 mA
PD Power Dissipation in Still Air, Plastic DIP+
                                        SOIC Package+
750
500
mW
Tstg Storage Temperature -65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260

*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/from 65 to 125
SOIC Package: : - 7 mW/ from 65 to 125
 



Description

The IN74HC652A is identical in pinout to the LS/ALS652. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.

Thes IN74HC652A consist of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex ransmission of data directly from the data bus or from the internal storage registers. Direction and Output Enable are provided to ct the read-time or stored data function. Data on the A or B Data bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock pins (A-to-B Clock or B-to-A Clock) regardless of the select or enable or enable control pins. When A-to-B Source and B-to-A Source are in the real-time transfer mode, it is also possible to tore data without using the internal D-type flip-flops by simulta-neously enabling Direction and Output Enable. In this ration each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high edance,each set of bus lines will remain at its last state.

The IN74HC652A has noninverted outputs.




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