Features: `Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 2.0 to 6.0 V `Low Input Current: 1.0 A` High Noise Immunity Characteristic of CMOS Devices`Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 2.0 to 6.0 V `Low Input Current: 1.0 A` High...
IN74HC651A: Features: `Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 2.0 to 6.0 V `Low Input Current: 1.0 A` High Noise Immunity Characteristic of CMOS Devices`Outputs Directly Int...
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Symbol | Parameter | Value | Unit |
VCC | DC Supply Voltage (Referenced to GND) | -0.5 to +7.0 | V |
VIN | DC Input Voltage (Referenced to GND) | -1.5to VCC +1.5 |
V |
VOUT | DC Output Voltage (Referenced to GND) | -0.5 to VCC +0.5 |
V |
IIN | DC Input Current, per Pin | ±20 | mA |
IOUT | DC Output Sink/Source Current, per Pin | ±35 | mA |
ICC | DC Supply Current, V and GND Pins | ±75 | mA |
PD | Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ |
750 500 |
mW |
Tstg | Storage Temperature | -65 to +150 | |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 |
Symbol | Parameter | Value | Unit |
VCC | DC Supply Voltage (Referenced to GND) | -0.5 to +7.0 | V |
VIN | DC Input Voltage (Referenced to GND) | -1.5to VCC +1.5 |
V |
VOUT | DC Output Voltage (Referenced to GND) | -0.5 to VCC +0.5 |
V |
IIN | DC Input Current, per Pin | ±20 | mA |
IOUT | DC Output Sink/Source Current, per Pin | ±35 | mA |
ICC | DC Supply Current, V and GND Pins | ±75 | mA |
PD | Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ |
750 500 |
mW |
Tstg | Storage Temperature | -65 to +150 | |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 |
The IN74HC651A is identical in pinout to the LS/ALS651. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
These devices of the IN74HC651A consist of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex ransmission of data directly from the data bus or from the internal storage registers. Direction and Output Enable are provided to ct the read-time or stored data function. Data on the A or B Data bus, or both, can be stored in the internal D flip-flops w-to-high transitions at the appropriate clock pins (A-to-B Clock or B-to-A Clock) regardless of the select or enable or able control pins. When A-to-B Source and B-to-A Source are in the real-time transfer mode, it is also possible to store data t using the internal D-type flip-flops by simulta-neously enabling Direction and Output Enable. In this configuration each t reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of s lines will remain at its last state.
The IN74HC651A has inverted outputs.