IN74HC393A

Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A• High Noise Immunity Characteristic of CMOS DevicesPinoutSpecifications Characteristics Symbol Rating Unit Supply voltage range(Referenc...

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SeekIC No. : 004375070 Detail

IN74HC393A: Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A• High Noise Immunity Characteristic of CMOS Dev...

floor Price/Ceiling Price

Part Number:
IN74HC393A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 A
• High Noise Immunity Characteristic of CMOS Devices



Pinout

  Connection Diagram


Specifications

Characteristics Symbol Rating Unit
Supply voltage range(Referenced to GND)

DC input voltage(Referenced to GND)

DC output voltage (Referenced to GND)
VCC

VIN

VOUT
-0.5 to +7.0

-1.5~VCC + 1.5

-0.5~VCC + 0.5
V

V

V
DC Input Current, per Pin

DC Output Current, per Pin
IIN

IOUT
±20

±50
mA

mA
DC Supply Current, VCC and GND Pins

Power Dissipation in Still Air, Plastic DIP+ SOIC Package+

Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
ICC

PD


TL
±50

750
500

260
mA

mW


Storage temperature TSTG -65 to 150


*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65° to 125
SOIC Package: : - 7 mW/ from 65° to 125




Description

The IN74HC393A is identical in pinout to the LS/ALS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.

This IN74HC393A consists of two independent 4-bit binary ripple counters with parallel outputs from each counter stage. A÷256 counter can be obtained by cascading the two binary counters.

Internal flip-flops are triggered by high-to-low transitions of the clock input. Reset for the counters is asynchronous and active-high. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or as strobes except when gated with the Clock of the IN74HC393A.




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