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IN74AC258

Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A; 0.1 A @ 25• High Noise Immunity Characteristic of CMOS Devices• Outputs Source/Sink 24 mAPinoutSpecifications Symbol Parameter Value ...

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SeekIC No. : 004374788 Detail

IN74AC258: Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A; 0.1 A @ 25• High Noise Immunity Characteristic...

IN74AC258 Data Sheet

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Part Number:
IN74AC258
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 A; 0.1 A @ 25
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IIN DC Input Current, per Pin ±10 mA
IOUT DC Output Sink/Source Current, per Pin ±50 mA
ICC DC Supply Current, VCC and GND Pins ±50 mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+		 750
500		 mW
Tstg Storage Temperature -65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)		 260

*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65° to 125
           SOIC Package: : - 7 mW/ from 65° to 125


Description

The IN74AC258 is identical in pinout to the LS/ALS258, HC/HCT258. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs.

This IN74AC258 selects a (4-bit) nibble from either the A or B inputs as determined by the Select input. The nibble is presented at the outputs in inverted from when the Output Enable pin is at a low level. A high level on the Output Enable pin switches the outputs into the high-impedance state.




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