Features: · AUTO-SELECTABLE LVD OR SINGLE-ENDED TERMINATION· 3.0pF MAXIMUM DISABLED OUTPUT CAPACITANCE· FAST RESPONSE, NO EXTERNAL CAPACITORS REQUIRED· COMPATIBLE WITH ACTIVE NEGATION DRIVERS· 5mA SUPPLY CURRENT IN DISCONNECT MODE· LOGIC COMMAND DISCONNECTS ALL TERMINATION LINES· DIFFSENSE LINE DR...
IMP5241: Features: · AUTO-SELECTABLE LVD OR SINGLE-ENDED TERMINATION· 3.0pF MAXIMUM DISABLED OUTPUT CAPACITANCE· FAST RESPONSE, NO EXTERNAL CAPACITORS REQUIRED· COMPATIBLE WITH ACTIVE NEGATION DRIVERS· 5mA S...
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The IMP5241/42 is a multimode SCSI terminator that conforms to the SCSI Parallel Interconnect- 2 (SPI-2) specification developed by the T10 standards committee for low voltage differential (LVD) termination, while providing backwards compatibility to the SCSI, SCSI-2, and SPI IMP5241 singleended specifications. Multimode compatibility permits the use of legacy devices on the bus without hardware alterations. Automatic mode selection is achieved through voltage detection on the diffsense line.
The IMP5241/42 utilizes IMP's adaptive nonlinear technology for the ultimate in SCSI bus performance while saving component cost and board area. Elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. The individual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. The high bandwidth architecture insures ULTRA2 performance while providing a clear migration path to ULTRA3 and beyond. When the IMP5241/42 is enabled, the differential sense (DIFFSENSE) pin supplies a voltage between 1.2V and 1.4V. In application, this pin is tied to the DIFFSENSE input of the corresponding LVD transceivers. This action enables the LVD transceiver function. DIFFSENSE is
capable of supplying a maximum of 15mA. Tying the DIFFSENSE pin high places the IMP5241/42 in a HI Z state indicating the presence of an HVD device. Tying the pin low places the part in a single-ended mode while also signaling the multimode transceiver to operate in a single-ended mode.
Recognizing the needs of portable and configurable peripherals, the IMP5241/42 have a TTL compatible sleep/disable mode. During this sleep/disable mode, power dissipation is reduced to a meager 5mA while also placing all outputs in a HI Z state. Also during sleep/ disable mode, the DIFFSENSE function is disabled and is placed in a HI Z state.
Another key feature of the IMP5241/42 is the master / slave function. Driving this pin high or floating the pin enables the 1.3V DIFFSENSE reference. Driving the pin low disables the on board DIFFSENSE reference and enables use of an external master reference device.