Features: · ULTRA-FAST RESPONSE FOR FAST-20 SCSI APPLICATIONS· 35MHz CHANNEL BANDWIDTH· 3.5V OPERATION· LESS THAN 4pF OUTPUT CAPACITANCE· SLEEP-MODE CURRENT LESS THAN 275mA· THERMALLY SELF LIMITING· NO EXTERNAL COMPENSATION CAPACITORS· COMPATIBLE WITH ACTIVE NEGATION DRIVERS (60mA / CHANNEL)· COMP...
IMP5225: Features: · ULTRA-FAST RESPONSE FOR FAST-20 SCSI APPLICATIONS· 35MHz CHANNEL BANDWIDTH· 3.5V OPERATION· LESS THAN 4pF OUTPUT CAPACITANCE· SLEEP-MODE CURRENT LESS THAN 275mA· THERMALLY SELF LIMITING·...
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TermPwr Voltage .................................+7V
Signal Line Voltage ............................ 0V to +7V
Regulator Output Current ............................1.2A
Operating Junction Temperature
Plastic (DB, DWP Packages) .......................... 150°C
Storage Temperature Range .................... -65°C to 150°C
Lead Temperature (Soldering, 10 seconds)...................300°C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal.
The IMP5225 SCSI terminator is part of IMP's family of high-performance, adaptive, non-linear mode SCSI products, which are designed to deliver true UltraSCSI performance in SCSI applications. The low voltage BiCMOS architecture employed in IMP5225 require these design offers superior performance to older linear passive and active techniques. IMP's new architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible - typically 35MHz, which is 100 times faster than the older linear regulator/terminator approach used by other manufacturers. Products using this older linear regulator approach have bandwidths which are dominated by the output capacitor and which are limited to 500KHz (see further discussion in the Functional Description section). The IMP IMP5225 architecture also eliminates the output compensation capacitor required in earlier terminator designs. Each is approved for use with SCSI-1, -2, -3, UltraSCSI and beyond - providing the highest performance alternative available today.
The IMP5225 architecture is much more tolerant of marginal system integrations. A key improvement offered by the IMP5225 lies in IMP5225 ability to insure reliable, error-free communications even in systems which do not adhere to recommended SCSI hardware design guidelines, such as the use of improper cable lengths and impedances. Frequently, IMP5225 situation is not controlled by the peripheral or host designer and, when problems occur, they are the first to
be made aware of the problem.
Quiescent current is typically less than (375mA) in this mode, while the output capacitance is also less than 4pF. Reduced component count is also inherent in
the IMP5225 architecture. Traditional termination techniques require large stabilization and transient protection capacitors of up to 20mF in value and size. The IMP5225 architecture does not require these components, allowing all the cost savings associated with inventory, board space, assembly, reliability, and component costs.
The IMP5225 is a superior pin-for-pin replacement for the LX5205, UC5607/5611/ 5617 or the DS2109.