Features: • 4 PLL architecture• Linear frequency programming• Independent frequency programming and SSC control• Band-gap circuit for differential output• High power-noise rejection ratio• 66MHz to 533MHz CPU frequency• VCO frequency up to 1.1G• Supp...
IDTCV109E: Features: • 4 PLL architecture• Linear frequency programming• Independent frequency programming and SSC control• Band-gap circuit for differential output• High power-no...
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Symbol | Description | Min | Max | Unit |
VDDA | 3.3V Core Supply Voltage | 4.6 | V | |
VDDIN | 3.3V Logic Input Supply Voltage | GND - 0.5 | 4.6 | V |
TSTG | Storage Temperature | 65 | +150 | °C |
TAMBIENT | Ambient Operating Temperature | 0 | +70 | °C |
TCASE | Ambient Operating Temperature | +115 | °C | |
ESD Prot | Input ESD Protection Human Body Model |
2000 | V |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
IDTCV109E is a 48 pin clock generation device for desktop PC platforms. This chip of IDTCV109E incorporates four PLLs to allow independent generation of CPU, AGP/ PCI, SRC, and 48MHz clocks. The dedicated PLL for Serial ATA clock provides high accuracy frequency. IDTCV109E also implements Band-gap referenced IREF to reduce the impact of VDD variation on differential outputs, which can provide more robust system performance.
Static PLL IDTCV109E frequency divide error can be as low as 36 ppm, providing high accuracy output clock. Each CPU, AGP/PCI, SRC clock has its own Spread Spectrum selection.