IDT82V2041E

The IDT82V2041E can be configured as a single channel T1, E1 or J1 Line Interface Unit. The IDT82V2041E performs clock/data recovery, AMI/ B8ZS/HDB3 line decoding and detects and reports the LOS conditions. An integrated Adaptive Equalizer is available to increase the receive sensitivity and enable programming of LOS levels. In transmit path, there is an AMI/ B8ZS/HDB3 encoder and Waveform Shaper. There is one Jitter Attenuator, which can be placed in either the receive path or the transmit path. The Jitter Attenuator can also be disabled. The IDT82V2041E supports both Single Rail and Dual Rail system interfaces. To facilitate the network maintenance, a PRBS/QRSS generation/detection circuit is integrated in the chip, and different types of loopbacks can be set according to the applications. Four different kinds of line terminating impedance, 75 , 100 , 110 and 120 are selectable. The chip also provides driver short-circuit protection and internal protection diode. The chip can be controlled by either software or hardware.

The IDT82V2041E can be used in LAN, WAN, Routers, Wireless Base Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay Access Devices, CSU/DSU equipment, etc.