IDT7M1024

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Inputs and Vcc terminals only.

The IDT7M1024 is a 4K x 36 bit high-speed synchronous Dual-Port Static RAM module constructed on a co-fired ceramic substrate using four IDT7099 (4K x 9) Dual-Port RAMs. That module is designed to be used as a standalone 36-bit Dual-Port Static RAM.

The IDT7M1024 provides a true synchronous Dual-Port Static RAM interface. Registered inputs provide very short set-up and hold times on address, data, and all critical control inputs. All internal registers are clocked on the rising edge of the clock signal. An asynchronous output enable is provided to ease asynchronous bus interfacing.

The internal write pulse width is independent of the HIGH and LOW periods of the clock. IDT7M1024 allows the shortest possible realized cycle times. Clock of IDT7M1024 enable inputs are provided to stall the operation of the address and data input registers without introducing clock skew for very fast interleaved memory applications.

The data inputs of IDT7M1024 are gated to control on-chip noise in bussed applications. The user of IDT7M1024 must guarantee that the R/W pins are LOW for at least one clock cycle before any write is attempted. A HIGH on the CE input for one clock cycle will power down the internal circuitry to reduce static power consumption.

The IDT7M1024 module is packaged in a 142-lead ceramicPGA (Pin Grid Array). All IDT military modules are constructed with semiconductor components manufactured in compliance with the latest revision of MIL-STD-883, Class B making them ideally suited to applications demanding the highest level of performance and reliability.