IDT74LVCH2541A

NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

The IDT74LVCH2541A octal buffer/driver is built using advanced dual metal CMOS technology. This device is ideal for driving bus lines or buffering memory address registers. This device features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.

The IDT74LVCH2541A has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver has been developed to drive ±12mA at the designated thresholds. To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environment.
The LVCH2541A has "bus-hold" which retains the inputs' last state
whenever the input goes to a high-impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.