IDT74LVCH16827A

NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

This 20-bit buffer of the IDT74LVCH16827A is built using advanced dual metal CMOS technology. The 20-bit bus driver provides high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pair of NANDed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flowthrough organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The IDT74LVCH16827A buffer is ideally suited for driving high capacitance loads and low impedance backplanes. The output buffers are designedm with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system.

The IDT74LVCH16827A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.

The IDT74LVCH16827A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.