IDT74LVCH16244A

Features:

* Typical tSK(o) (Output Skew) < 250ps
* ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
*VCC = 3.3V ± 0.3V, Normal Range
*VCC = 2.7V to 3.6V, Extended Range
* CMOS power levels (0.4 W typ. static)
* All inputs, outputs, and I/O are 5V tolerant
* Available in SSOP, TSSOP, and TVSOP packages


Application

* 5V and 3.3V mixed voltage systems
* Data communication and telecommunication systems


Pinout




Specifications

Symbol	Description	Max	Unit
VTERM	Terminal Voltage with Respect to GND	0.5 to +6.5	V
TSTG	Storage Temperature	65 to +150	°C
IOUT	DC Output Current	50 to +50	mA
IIK IOK	Continuous Clamp Current, VI < 0 or VO < 0	50	mA
ICC ISS	Continuous Current through each VCC or GND	±100	mA

Description

The IDT74LVCH16244A 16-bit buffer/driver is built using advanced dual metal CMOS technology.   The LVCH16244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides true outputs and symmetrical active-low output-enable (OE) inputs.
All pins of this 16-bit buffer/driver can be driven from either 3.3V or 5V devices.  This feature allows the use of this device a translator in a mixed 3.3V/5V supply system.
The IDT74LVCH16244A has been designed with a ±24mA output driver. The driver is capable of driving a moderate to heavy load while maintaining speed performance.
The IDT74LVCH16244A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance.  This prevents floating inputs and eliminates the need for pull-up/down resistors.