IDT74LVC623A

NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

This octal transceiver is built using advanced dual metal CMOS technology. This high-speed, low power transceiver is ideal for asynchronous communication between two busses (A and B). The control function of IDT74LVC623A implementation allows maximum flexibility in timing. This device allows data transmission from the A bus to the B bus, or from the B bus to the A bus, depending upon the levels at the enable inputs (OEAB, OEBA). The enable inputs can be used to disable the device so that the buses are effectively isolated. The capability to store data by simultaneous enabling of OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs of IDT74LVC623A are enabled and all other data sources to the two sets of the bus lines are at high impedence OFF-state, both sets of bus lines will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical.

The LVC623A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.

All pins can be driven from either 3.3V or 5V devices. This feature allows the use of IDT74LVC623A as a translator in a mixed 3.3V/5V supply system.