IDT74LVC374A

Features:

* 0.5 MICRON CMOS Technology
* ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
   machine model (C = 200pF, R = 0)
*VCC = 3.3V ± 0.3V, Normal Range
*VCC = 2.7V to 3.6V, Extended Range
* CMOS power levels (0.4 W typ. static)
* Rail-to-rail output swing for increased noise margin
* All inputs, outputs, and I/O are 5V tolerant
* Supports hot insertion
* Available in SOIC, SSOP, QSOP, and TSSOP packages


Application

* 5V and 3.3V mixed voltage systems
* Data communication and telecommunication systems


Pinout




Specifications

Symbol	Description	Max	UNITS
VTERM	Terminal Voltage with Respect to GND	0.5 to +6.5	V
TSTG	Storage Temperature	65 to +150	°C
IOUT	DC Output Current	50 to +50	mA
IIK IOK	Continuous Clamp Current, VI < 0 or VO < 0	50	mA
ICC ISS	Continuous Current through each VCC or GND	±100	mA

Description

The IDT74LVC374A octal edge triggered D-type flip-flop is built using advanced dual metal CMOS technology. This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads.The LVC374A device is particularly suitable for implementing buffer regis-ters, input-output (I/O) ports, bidirectional bus drivers, and working regis-ters.

On the positive transition of the clock (CLK) input, the Q outputs of the IDT74LVC374A are set to the logic levels set up at the data (D)inputs.