IDT74FCT652CT

Features: • A and C grades• Low input and output leakage 1A (max.)• CMOS power levels• True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)• High Drive outputs (-15mA IOH, 64mA IOL)• Meets or exceeds JEDEC standard 18 specificationsR...

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IDT74FCT652CT Picture
SeekIC No. : 004373075 Detail

IDT74FCT652CT: Features: • A and C grades• Low input and output leakage 1A (max.)• CMOS power levels• True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)• H...

floor Price/Ceiling Price

Part Number:
IDT74FCT652CT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• A and C grades
• Low input and output leakage 1A (max.)
• CMOS power levels
• True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 64mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in SOIC, SSOP, and QSOP packages



Pinout

  Connection Diagram


Specifications

Symbol

Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
0.5 to VCC+0.5
V
TSTG
Storage Temperature
65 to +150
°C

IOUT

DC Output Current
60 to +120
mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.




Description

The IDT74FCT652CT consists of a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The IDT74FCT652CT utilizes GAB and GBA signals to control the transceiver functions. SAB and SBA control pins are provided to select either real- time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data and a high selects stored data.

Data on the A or B data bus, or both, can be stored in the internal D flipflops by low-to-high transitions at the appropriate clock pins (CPAB or CPBA), regardless of the select or enable control pins.




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