Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (max.)• VCC = 5V ±10%• High drive outputs (32mA IOH, 64mA IOL)• Power off disable out...
IDT74FCT16652AT: Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (ma...
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Symbol |
Description |
Max |
Unit |
VTERM(2) |
Terminal Voltage with Respect to GND |
0.5 to +7 |
V |
VTERM(3) |
Terminal Voltage with Respect to GND |
0.5 to VCC+0.5 |
V |
TSTG |
Storage Temperature |
65 to +150 |
°C |
IOUT |
DC Output Current |
60 to +120 |
mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
The IDT74FCT16652AT 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. For example, the xOEAB and xOEBA signals control the transceiver functions.
The IDT74FCT16652AT control pins are provided to select either real time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real time data. A low input level selects real-time data and a high level selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D-flip-flops by low-to-high transitions at the appropriate clock pins (xCLKAB or xCLKBA), regardless of the select or enable control pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
The IDT74FCT16652AT is ideally suited for driving high capacitance loads and lowimpedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.