IDT74FCT16646ET

Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (max.)• VCC = 5V ± 10%• High drive outputs (-32mA IOH, 64mA IOL)• Power off disable o...

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IDT74FCT16646ET Picture
SeekIC No. : 004372965 Detail

IDT74FCT16646ET: Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (ma...

floor Price/Ceiling Price

Part Number:
IDT74FCT16646ET
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage 1A (max.)
• VCC = 5V ± 10%
• High drive outputs (-32mA IOH, 64mA IOL)
• Power off disable outputs permit "live insertion"
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C
• Available in SSOP and TSSOP packages



Pinout

  Connection Diagram


Specifications

Symbol

Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
0.5 to VCC+0.5
V
TSTG
Storage Temperature
65 to +150
°C

IOUT

DC Output Current
60 to +120
mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.




Description

The IDT74FCT16646ET 16-bit registered transceiver is built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the internal storage registers. Each 8-bit transceiver/register features direction control (xDIR), over-riding Output Enable control (xOE) and Select lines (xSAB and xSBA) to select either real-time data or stored data. Separate clock inputs are provided for A and B port registers. Data on the A or B data bus, or both, can be stored in the internal registers by the low-to-high transitions at the appropriate clock pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The IDT74FCT16646ET is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.




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