IDT74FCT166245T

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX and FCT166XXXT(A port) Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX and FCT166XXXT(A port).

The IDT74FCT166245T 16-bit transceiver is built using advanced dual metal CMOS technology. These high-speed, low-power transceivers are ideal for synchronous communication between two buses (A and B). The Direction and Output Enable controls operate these devices as either two independent 8-bit transceivers or one 16-bit transceiver. The direction control pin (xDIR) controls the direction of data flow. The output enable pin (xOE) overrides the direction control and disables both ports. All inputs are designed with hysteresis for improved noise margin.

The IDT74FCT166245T is suited for very low noise, point-to-point driving where there is a single receiver, or a light lumped load (<100pF). The buffers are designed to limit the output current to levels which will avoid noise and ringing on the signal lines without using external series terminating resistors. These parts have a ±8mA driver on the "A" Port and a +64/32mA driver on the "B" Port, making them ideal for interfacing noisy system busses to noise sensitive interfaces.