IDT74FCT162H952CT

Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (max.)• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R...

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IDT74FCT162H952CT Picture
SeekIC No. : 004372909 Detail

IDT74FCT162H952CT: Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (m...

floor Price/Ceiling Price

Part Number:
IDT74FCT162H952CT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/22

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Product Details

Description



Features:

• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage 1A (max.)
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• Bus Hold retains last active bus state during 3-state
• Eliminates the need for external pull up resistors
• Available in SSOP and TSSOP packages



Pinout

  Connection Diagram


Specifications

Symbol

Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
0.5 to VCC+0.5
V
TSTG
Storage Temperature
65 to +150
°C

IOUT

DC Output Current
60 to +120
mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.




Description

The IDT74FCT162H952CT 16-bit registered transceiver is built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be low to enter data from the A port. xCLKAB controls the clocking function. When xCLKAB toggles from low-to-high, the data present on the A port will be clocked into the register. xOEAB performs the output enable function on the B port. Data flow from the B port to A port is similar but requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together.

The IDT74FCT162H952CT has "Bus Hold" which retains the input's last state whenever the input goes to high impedance. This prevents "floating" inputs and eliminates the need for pull-up/down resistors.




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