IDT74FCT162823CT

Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (max.)• VCC = 5V ±10%• Balanced Output Drivers of ±24mA• Reduced system switching noi...

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IDT74FCT162823CT Picture
SeekIC No. : 004372895 Detail

IDT74FCT162823CT: Features: • 0.5 MICRON CMOS Technology• High-speed, low-power CMOS replacement for ABT functions• Typical tSK(o) (Output Skew) < 250ps• Low input and output leakage 1A (ma...

floor Price/Ceiling Price

Part Number:
IDT74FCT162823CT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage 1A (max.)
• VCC = 5V ±10%
• Balanced Output Drivers of ±24mA
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C
• Available in SSOP and TSSOP packages



Pinout

  Connection Diagram


Specifications

Symbol

Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
0.5 to VCC+0.5
V
TSTG
Storage Temperature
65 to +150
°C

IOUT

DC Output Current
60 to +120
mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.




Description

The IDT74FCT162823CT 18-bit bus interface register is built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN) and clear (xCLR) controls are ideal for parity bus interfacing in high-performance synchronous systems. The control inputs are organized to operate the device as two 9-bit registers or one 18-bit register. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The IDT74FCT162823CT has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The IDT74FCT162823CT is a plug-in replacement for the FCT16823T and ABT16823 for on-board interface applications.




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