IDT74FCT162601ET

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.

The IDT74FCT162601ET 18bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in either direction in a transparent, latched or clocked mode. Each direction has an independent latch enable, an independent clock with a clock enable, and an independent output enable. The package is organized with a flow-through signal pin organization to ease board layout. All inputs are designed with hysteresis for improved noise margin.

This transceiver of the IDT74FCT162601ET is ideally suited for high speed memory interfaces which utilize high speed synchronous writes, by clocking the data into a high speed register. Reads can then be performed in a transparent or latched mode utilizing the same transceiver.

The IDT74FCT162601ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

The IDT74FCT162601ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall timesreducing the need for external series terminating resistors. The FCT162601AT/CT/ET are plug-in replacements for the FCT16601AT/CT/ET and ABT16601 for on-board bus interface applications.