Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)• VCC = 3.3V ± 0.3V, Normal Range• VCC = 2.7V to 3.6V, Extended Range• VCC = 2.5V ± 0.2V...
IDT74ALVCH16543: Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•...
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Description |
Symbol |
Max |
unit |
Terminal Voltage with Respect to GND |
VTERM(2) |
0.5 to +4.6
|
V |
Terminal Voltage with Respect to GND |
VTERM(3)
|
0.5 to VCC+0.5 |
V |
Storage Temperature |
TSTG |
65 to +150
|
° C |
DC Output Current |
IOUT
|
50 to +50 |
mA |
Continuous Clamp Current, VI < 0 or VI > VCC |
IIK |
±50
|
mA |
Continuous Clamp Current, VO < 0 |
IOK |
50 |
mA |
Continuous Current through each VCC or GND |
ICC ISS |
±100 |
mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
This 16-bit registered transceiver of the IDT74ALVCH16543 is built using advanced dual metal CMOS technology. The ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using CEBA, LEBA, and OEBA.
The IDT74ALVCH16543 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
The IDT74ALVCH16543 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.