IDT74ALVCH16345

Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)• VCC = 3.3V ± 0.3V, Normal Range• VCC = 2.7V to 3.6V, Extended Range• VCC = 2.5V ± 0.2V...

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IDT74ALVCH16345 Picture
SeekIC No. : 004372770 Detail

IDT74ALVCH16345: Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•...

floor Price/Ceiling Price

Part Number:
IDT74ALVCH16345
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/28

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Product Details

Description



Features:

• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages



Application

• 3.3V high speed systems
• 3.3V and lower voltage computing systems
• High speed synchronous DRAM modules
• PC motherboards



Pinout

  Connection Diagram


Specifications

Description
Symbol
Max
unit
Terminal Voltage with Respect to GND
VTERM(2)
0.5 to +4.6
V
Terminal Voltage with Respect to GND
VTERM(3)
0.5 to VCC+0.5
V
Storage Temperature
TSTG
65 to +150
° C
DC Output Current
IOUT
50 to +50
mA
Continuous Clamp Current,
VI < 0 or VI > VCC
IIK
±50
mA
Continuous Clamp Current, VO < 0
IOK
50
mA
Continuous Current through each
VCC or GND
ICC
ISS
±100
mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.



Description

This registered address line driver of the IDT74ALVCH16345 is built using advanced dual metal CMOS technology. The ALVCH16345 is configured with banks of four drivers, each to be used in high speed synchronous memory applications. The ALVCH16345 is ideal for driving memory modules in systems where multiple memory modules are used. One each of the four output banks drives a different module; modules can be added or removed without affecting the signal integrity of the other modules in the system.

Dual clock enables (CEx) of the IDT74ALVCH16345 allow use of the device in high speed memory interleaving applications where the clock can be alternately enabled and disabled, allowing the address to be held for additional cycles during memory access.

The IDT74ALVCH16345 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.

The IDT74ALVCH16345 has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.




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