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IDT74ALVCH162836

Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)• VCC = 3.3V ± 0.3V, Normal Range• VCC = 2.7V to 3.6V, Extended Range• VCC = 2.5V ± 0.2V...

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SeekIC No. : 004372769 Detail

IDT74ALVCH162836: Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•...

IDT74ALVCH162836 Data Sheet

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Part Number:
IDT74ALVCH162836
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages


Application

• SDRAM Modules
• PC Motherboards
• Workstations


Pinout

Connection Diagram


Specifications

Description
Symbol
Max
 unit
Terminal Voltage with Respect to GND
VTERM(2)
0.5 to +4.6
 V
Terminal Voltage with Respect to GND
VTERM(3)
0.5 to VCC+0.5
 V
Storage Temperature
TSTG
65 to +150
 ° C
DC Output Current
IOUT
50 to +50
 mA
Continuous Clamp Current,
VI < 0 or VI > VCC
IIK
±50
 mA
Continuous Clamp Current, VO < 0
IOK
50
 mA
Continuous Current through each
VCC or GND
ICC
ISS
±100
 mA



Description

This 20-bit universal bus driver of the IDT74ALVCH162836 is built using advanced dual metal CMOS technology. Data flow from A to Y is controlled by the output-enable (OE) input.

The IDT74ALVCH162836 operates in the transparent mode when the latch-enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop the low-to-high transition of CLK. When OE is high, the outputs are in the highimpedance state. The ALVCH162836 has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver been designed to drive ±12mA at the designated threshold levels.

The IDT74ALVCH162836 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high-impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.




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