IDT74ALVC1G00

Features:

0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015;
           > 200V using machine model (C = 200pF, R = 0)
0.65mm pitch PSOP package
Extended commercial range of 40°C to + 85°C
VCC = 3.3V ± 0.3V, Normal Range
VCC = 1.65V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4 W typ. static)
Rail-to-Rail output swing for increased noise margin


Application

• 3.3V High Speed Systems
• 3.3V and lower voltage computing systems


Pinout




Specifications

Symbol	Description	Max.	Unit
VTERM(2)	Terminal Voltage with Respect to GND	0.5 to + 4.6	V
VTERM(3)	Terminal Voltage with Respect to GND	0.5 to VCC+ 0.5	V
TSTG	Storage Temperature	65 to + 150	°C
IOUT	DC Output Current	50 to + 50	mA
IIK	Continuous Clamp Current, VI < 0 or VI > VCC	± 50	mA
IOK	Continuous Clamp Current, VO < 0	50	mA
ICC ISS	Continuous Current through each VCCor GND	±100	mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except V_CC.


Description

This single 2-input positive-NAND gate of the IDT74ALVC1G00 is built using advanced dual metal CMOS technology. The ALVC1G00 is designed for 1.65V to 3.6V V_CC operation and performs the Boolean function Y = A • B or Y = A + B in positive logic.

The IDT74ALVC1G00 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.