IDT72V3613

NOTES:
1. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded provided the input and output current ratings are observed.

The IDT72V3613 is a pin and functionally compatible version of the IDT723613, designed to run off a 3.3V supply for exceptionally low-power consumption. This device is a monolithic, high-speed, low-power, CMOS synchronous (clocked) FIFO memory which supports clock frequencies up to 83 MHz and has read-access times as fast as 8 ns. The 64 x 36 dual-port SRAM FIFO buffers data from port A to port B. The FIFO operates in IDT Standard mode and has flags to indicate empty and full conditions, and two programmable flags, Almost-Full (AF) and Almost-Empty (AE), to indicate when a selected number of words is stored in memory. FIFO data on port B of the IDT72V3613 can be output in 36- bit, 18-bit, and 9-bit formats with a choice of Big- or Little-Endian configurations.