IDT72V14071L15TFI

DescriptionThe IDT72V14071L15TFI is one member of the IDT72V14071 series.The IDT72V14071 is dual ultimedia FIFO.The device is functionally equivalent to two independent FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins.Each of the two FIFOs (desi...

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SeekIC No. : 004372549 Detail

IDT72V14071L15TFI: DescriptionThe IDT72V14071L15TFI is one member of the IDT72V14071 series.The IDT72V14071 is dual ultimedia FIFO.The device is functionally equivalent to two independent FIFOs in a single package wit...

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Part Number:
IDT72V14071L15TFI
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/31

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Product Details

Description



Description

The IDT72V14071L15TFI is one member of the IDT72V14071 series.The IDT72V14071 is dual ultimedia FIFO.The device is functionally equivalent to two independent FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins.Each of the two FIFOs (designated FIFO A and FIFO B) has a 8-bit input data port (DA0 - DA7, DB0 - DB7) and a 8-bit output data port (QA0 - QA7,QB0 - QB7). Each input port is controlled by a free-running clock (WCLKA,WCLKB), and a Write Enable pin (WENA, WENB). Data is written into each of the two arrays on every rising clock edge of the Write Clock (WCLKA, WCLKB) when the appropriate Write Enable pin is asserted.

Features of the IDT72V14071L15TFI are:(1)offers optimal combination of large capacity, high speed,design flexibility and small footprint; (2)15 ns read/write cycle time; (3)5V input tolerant; (4)separate control lines and data lines for each FIFO; (5)separate empty and Full flags for each FIFO; (6)enable puts output data lines in high-impedance state; (7)space-saving 64-pin plastic thin quad flat pack (STQFP); (8)industrial temperature range (40 to +85).The output port of each FIFO bank is controlled by its associated  clock pin(RCLKA, RCLKB) and Read Enable pin (RENA, RENB). The Read Clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. An Output Enable pin (OEA, OEB) is provided on the read port of each FIFO for three-state output control.

The absolute maximum ratings of the IDT72V14071L15TFI can be summarized as:(1)terminal voltage with respect to GND:-0.5 to 5V;(2)storage temperature:-55 to 125;(3)DC output current:-50 to 50mA.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.  This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied.  Exposure to absolute maximum rating conditions for extended periods may affect reliability.




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