IDT72605

Features: • Two independent FIFO memories for fully bidirectiona data transfers• 256 x 18 x 2 organization (IDT 72605)• 512 x 18 x 2 organization (IDT 72615)• Synchronous interface for fast (20ns) read and write cycle times• Each data port has an independent clock and...

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IDT72605 Picture
SeekIC No. : 004372444 Detail

IDT72605: Features: • Two independent FIFO memories for fully bidirectiona data transfers• 256 x 18 x 2 organization (IDT 72605)• 512 x 18 x 2 organization (IDT 72615)• Synchronous int...

floor Price/Ceiling Price

Part Number:
IDT72605
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/19

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Product Details

Description



Features:

• Two independent FIFO memories for fully bidirectiona data transfers
• 256 x 18 x 2 organization (IDT 72605)
• 512 x 18 x 2 organization (IDT 72615)
• Synchronous interface for fast (20ns) read and write cycle times
• Each data port has an independent clock and read/write control
• Output enable is provided on each port as a three-state control of the data bus
• Built-in bypass path for direct data transfer between two ports
• Two fixed flags, Empty and Full, for both the A-to-B and the B-to-A FIFO
• Programmable flag offset can be set to any depth in the FIFO
• The synchronous BiFIFO is packaged in a 64-pin TQFP (Thin Quad Flatpack), 68-pin PGA and 68-pin PLCC
• Industrial temperature range (-40oC to +85oC) is available, tested to military electrical specifications



Pinout

  Connection Diagram


Specifications

Symbol
Rating
Commercial
Military
Unit
VTERM(2)
Terminal Voltage
with Respectto GND
0.5 to +7.0
0.5 to +7.0
V
TA
OperatingTemperature
0 to +70
55 to +125
V
TBIAS
TemperatureUnder Bia
55 to +125
65 to +135
°C
TSTG
StorageTemperature
55 to +125
65 to +150
°C
IOUT
DC OutputCurrent
50
50
mA
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.



Description

The IDT72605 are very high-speed, lowpower bidirectional First-In, First-Out (FIFO) memories, with synchronous interface for fast read and write cycle times. The SyncBiFIFOÔ is a data buffer that can store or retrieve information from two sources simultaneously. Two Dual-Port FIFO memory arrays are contained in the SyncBiFIFO; one data buffer for each direction.

The IDT72605 has registers on all inputs and outputs. Data is only transferred into the I/O registers on clock edges, hence the interfaces are synchronous. Each Port has its own independent clock. Data transfers to the I/O registers are gated by the enable signals. The transfer direction for each port is controlled independently by a read/write signal. Individual output enable signals control whether the SyncBiFIFO is driving the data lines of a port or whether those data lines are in a high-impedance state.

Bypass control of the IDT72605 allows data to be directly transferred from input to output register in either direction. The SyncBiFIFO has eight flags. The flag pins are full, empty, almost-full, and almost-empty for both FIFO memories.

The offset depths of the almost-full and almost-empty flags can be programmed to any location.

The IDT72605 is fabricated using IDT's high-speed, submicron CMOS technology.




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