IDT723611

The IDT723611 is a monolithic, high-speed, low-power,CMOS Synchronous (clocked) FIFO memory which supports
lock frequencies up to 67MHz and has read access times asfast as 10ns. The 64 x 36 dual-port FIFO buffers data from Port to Port B. The FIFO has flags to indicate empty and fullconditions, and two programmable flags, Almost-Full (AF) andAlmost-Empty (AE), to indicate when a selected number ofwords is stored in memory. Communication between eachport can take place through two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has beenstored. Parity is checked passively on each port and may beignored if not desired. Parity generation can be selected fordata read from each port. Two or more devices may be usedin parallel to create wider data paths.

The IDT723611 is a synchronous (clocked) FIFO, meaningeach port employs a synchronous interface. All datatransfers through a port are gated to the LOW-to-HIGHtransition of a port clock by enable signals. The clocks foreach port are independent of one another and can be asyn-chronous or coincident. The enables for each port are arranged
to provide a simple bidirectional interface betweenmicroprocessors and/or buses with synchronous control.

The Full-Flag (FF) and Almost-Full (AF) flag of the FIFO aretwo-stage synchronized to the port clock that writes data intoits array (CLKA). The Empty Flag (EF) and Almost-Empty (AE)flag of the FIFO are two-stage synchronized to the port clockthat reads data from its array.

The IDT723611 is characterized for operation from 0°C to70°C.