Features: 32K x 8 advanced high-speed CMOS static RAMCommercial (0° to 70°C) and Industrial (-40° to 85°C)temperature optionsEqual access and cycle timesCommercial and Industrial: 12/15/20/25nsOne Chip Select plus one Output Enable pinBidirectional data inputs and outputs directly TTL-compatibleLo...
IDT71256SA: Features: 32K x 8 advanced high-speed CMOS static RAMCommercial (0° to 70°C) and Industrial (-40° to 85°C)temperature optionsEqual access and cycle timesCommercial and Industrial: 12/15/20/25nsOne C...
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32K x 8 advanced high-speed CMOS static RAM
Commercial (0° to 70°C) and Industrial (-40° to 85°C)temperature options
Equal access and cycle times
Commercial and Industrial: 12/15/20/25ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly TTL-compatible
Low power consumption via chip deselect
Commercial product available in 28-pin 300- and 600-mil
Plastic DIP, 300 mil Plastic SOJ and TSOP packages
Industrial product available in 28-pin 300 mil Plastic SOJ and TSOP packages
Symbol |
Parameter |
Value |
Unit |
VCC |
Supply Voltage |
-0.5 to +7.0 |
V |
VTERM |
Terminal Voltage |
55 toVCC +0.5 |
V |
TBIAS |
Temperature Under Bias |
55 to +125 |
°C |
TSTG |
Storage Temperature |
55 to +125 |
°C |
PT |
Power Dissipation |
1.0 |
W |
IOUT |
DC Output Current |
50 |
mA |
The IDT71256SA is a 262,144-bit high-speed Static RAM organized as 32K x 8. It is fabricated using IDT's high-perfomance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory needs.
The IDT71256SA has an output enable pin which operates as fast as 6ns, with address access times as fast as 12ns. All bidirectional inputs and outputs of the IDT71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.
The IDT71256SA is packaged in 28-pin 300- and 600-mil Plastic DIP,28-pin 300 mil Plastic SOJ and TSOP.