Features: ` 256K x 4 advanced high-speed CMOS static RAM` JEDEC revolutionary pinout (center power/GND) for reduced noise.` Equal access and cycle times - Commercial and Industrial: 12/15/20ns` One Chip Select plus one Output Enable pin` Bidirectional inputs and outputs directly TTL-compatible` Lo...
IDT71128: Features: ` 256K x 4 advanced high-speed CMOS static RAM` JEDEC revolutionary pinout (center power/GND) for reduced noise.` Equal access and cycle times - Commercial and Industrial: 12/15/20ns` One ...
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Symbol | Rating | Value | Unit |
VTERM(2) | Terminal Voltage with Respect to VSS |
-0.5 to +7.0(2) | V |
TA | Operating Temperature | 0 to +70 | |
TBIAS | Temperature Under Bias | 55 to +125 | |
TSTG | Storage Temperature | 55 to +125 | |
PT | Power Dissipation | 1.25 | W |
IOUT | DC Output Current | 50 | mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.5V.
The IDT71128 is a 1,048,576-bit high-speed static RAM organized as 256K x 4. It is fabricated using IDT's high-performance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory needs.
The JEDEC centerpower/GND pinout reduces noise generation and improves system performance.
The IDT71128 has an output enable pin which operates as fast as 6ns, with address access times as fast as 12ns available. All bidirectional inputs and outputs of the IDT71128 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.
The IDT71128 is packaged in a 32-pin 400 mil Plastic SOJ.