IDT70V9159L Selling Leads, Price trend, IDT70V9159L DataSheet download, circuit diagram from SeekIC.com

Features: True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access Commercial: 6.5/7.5/9ns (max.) Industrial: 7.5ns (max.) Low-power operation IDT70V916/59L/59LActive: 450mW (typ.)Standby: 1.5mW (typ.) Flow-Through or Pipelined outp...

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SeekIC No. : 004372160 Detail

IDT70V9159L: Features: True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access Commercial: 6.5/7.5/9ns (max.) Industrial: 7.5ns (max.) Low-power...

IDT70V9159L Data Sheet

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Part Number:: IDT70V9159L
Supply Ability:: 5000

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Negotiable

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Upload time: 2024/12/30

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Product Details

Description

Features:

True Dual-Ported memory cells which allow simultaneous access of the same memory location
High-speed clock to data access
Commercial: 6.5/7.5/9ns (max.)
Industrial: 7.5ns (max.)
Low-power operation
IDT70V916/59L/59L
Active: 450mW (typ.)
Standby: 1.5mW (typ.)
Flow-Through or Pipelined output mode on either port via the FT/PIPE pins
Counter enable and reset features
Dual chip enables allow for depth expansion without additional logic
3.5ns setup to clock and 0ns hold on all control, data, andaddress inputs
Data input, address, and control registers
Fast 6.5ns clock to data out in the Pipelined output mode
Self-timed write allows fast cycle time
10ns cycle time, 100MHz operation in Pipelined output mode
Separate upper-byte and lower-byte controls for multiplexed bus and bus matching compatibility
LVTTL- compatible, single 3.3V (±0.3V) power supply
Industrial temperature range (40°C to +85°C) isavailable for 83 MHz
Available in a 100-pin Thin Quad Flatpack (TQFP) and 100- pin fine pitch Ball Grid Array (fpBGA) packages.

Pinout

Connection Diagram

NOTES:
1. A13 is a NC for IDT70V9159.
2. All VDD pins must be connected to power supply.
3. All VSS pins must be connected to ground supply.
4. Package body is approximately 14mm x 14mm x 1.4mm.
5. This package code is used to reference the package diagram.
6. This text does not indicate orientation of the actual part-marking.

Specifications

Symbol	Rating	Commercial & Industrial	Unit
V_TERM	Terminal Voltage with respect to GND	-0.5 to +4.6	V
V_TERM	Terminal Voltage	-0.5 to VCC	V
V_TER⁽²⁾	Temperature Under Bias	-55 to +125	°C
T_STG	Storage Temperature	-65 to +150	°C
I_OUT	DC Output Current	50	mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed VCC +0.3V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 0.3V.</F

Description

The IDT70V9159L is a high-speed 16/8K x 9 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times.

With an input data register, the IDT70V9159L has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 450mW of power.

IDT70V9159L

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