Features: High-speed clock-to-data output times Commercial: 20/25ns (max.) Industrial: 20/25ns (max.) Low-power operation IDT70V914SActive: 250 mW (typ.)Standby: 10 mW (typ.) Architecture based on Dual-Port RAM cells Allows full simultaneous access from both ports Synchronous operation 5ns setup ...
IDT70V914S: Features: High-speed clock-to-data output times Commercial: 20/25ns (max.) Industrial: 20/25ns (max.) Low-power operation IDT70V914SActive: 250 mW (typ.)Standby: 10 mW (typ.) Architecture based on ...
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Symbol |
Rating |
Commercial
& Industrial |
Unit |
VTERM |
Terminal Voltage with respect to GND |
-0.5 to +4.6 |
V |
VTERM |
Terminal Voltage |
-0.5 to VCC |
V |
VTER(2) |
Temperature Under Bias |
-55 to +125 |
°C |
TSTG |
Storage Temperature |
-65 to +150
|
°C |
IOUT |
DC Output Current |
50
|
mA |
The IDT70V914S is a high-speed 4K x 9 bit synchronous Dual-Port RAM. The memory array is based on Dual-Port memory cells to allow simultaneous access from both ports. Registers on control, data, and address inputs provide low set-up and hold times.
The timing latitude provided by this approach allow systems to be designed with very short cycle times. With an input data register, this device has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts.
The IDT70V914S utilizes a 9-bit wide data path to allow for parity at the user's option. This feature is especially useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. Fabricated using IDT's CMOS high-performance technology, these Dual-Ports typically operate on only 250mW of power at maximum highspeed clock-to-data output times as fast as 20ns.
An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode. The IDT70V914S is packaged in an 80-pin TQFP.