Features: ` 128K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture 64 independent 2K x 36 banks 4 megabits of memory on chip` Bank access controlled via bank address pins` High-speed data access Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/4.2ns (133MHz) (max.) Industrial: 3.6ns (166...
IDT70V7599S: Features: ` 128K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture 64 independent 2K x 36 banks 4 megabits of memory on chip` Bank access controlled via bank address pins` High-speed ...
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Symbol | Rating |
Commercial & Industrial |
Unit |
VTERM(2) | Terminal Voltage with Respect to GND |
0.5 to +4.6 |
V |
TBIAS | Temperature Under Bias |
55 to +125 |
|
TSTG | Storage Temperature |
60 to +150 |
|
IOUT | DC Output Current |
50 |
mA |
The IDT70V7599S is a high-speed 128Kx36 (4Mbit) synchronous Bank-Switchable Dual-Ported SRAM organized into 64 independent 2Kx36 banks. The device has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 2Kx36 memory block not already accessed by the other port. Accesses by the ports into specific banks are controlled via the bank address pins under the user's direct control.
Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times. With an input data register, the IDT70V7599S has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The dual chip enables also acilitate depth expansion.
The IDT70V7599S can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device(VDD) remains at 3.3V. Please refer also to the functional description on page 19.