Features: ` 64K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture 64 independent 1K x 36 banks- 2 megabits of memory on chip` Bank access controlled via bank address pins` High-speed data access -Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/4.2ns (133MHz) (max.)-Industrial: 3.6ns (166MHz...
IDT70V7589S: Features: ` 64K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture 64 independent 1K x 36 banks- 2 megabits of memory on chip` Bank access controlled via bank address pins` High-speed da...
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Symbol | Rating |
Commercial & Industrial |
Unit |
VTERM(2) | Terminal Voltage with Respect to GND |
-0.5 to +4.6 |
V |
TBIAS | Temperature Under Bias |
55 to +125 |
|
TSTG | Storage Temperature |
65 to +150 |
|
IOUT | DC Output Current |
50 |
mA |
The IDT70V7589S is a high-speed 64Kx36 (2Mbit) synchronousBank-Switchable Dual-Ported SRAM organized into 64 independent1Kx36 banks. The device has two independent ports with separatecontrol, address, and I/O pins for each port, allowing each port to accessany 1Kx36 memory block not already accessed by the other port.Accesses by the ports into specific banks are controlled via the bankaddress pins under the user's direct control.
Registers of the IDT70V7589S on control, data, and address inputs provide minimal setupand hold times. The timing latitude provided by this approach allowssystems to be designed with very short cycle times. With an input data register, the IDT70V7589 has been optimized for applications havingunidirectional or bidirectional data flow in bursts. An automatic power downfeature, controlled by CE0 and CE1, permits the on-chip circuitry of eachport to enter a very low standby power mode. The dual chip enables alsofacilitate depth expansion.
The IDT70V7589S can support an operating voltage of either 3.3V or 2.5Von one or both ports, controllable by the OPT pins. The power supply forthe core of the device(VDD) remains at 3.3V. Please refer also to thefunctional description on page 19.