IDT70V25L

Features:

` True Dual-Ported memory cells which allow simultaneous reads of the same memory location
` High-speed access Commercial: 15/20/25/35/55ns (max.) Industrial: 20/25/35/55ns (max.)
` Low-power operation
  IDT70V25S Active: 400mW (typ.) Standby: 3.3mW (typ.) IDT70V25L Active: 380mW (typ.) Standby: 660W (typ.)
` Separate upper-byte and lower-byte control for multiplexed bus compatibility
` IDT70V25 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device
` M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave
` BUSY and Interrupt Flag
` On-chip port arbitration logic
` Full on-chip hardware support of semaphore signaling between ports
` Fully asynchronous operation from either port
` LVTTL-compatible, single 3.3V (±0.3V) power supply
` Available in 84-pin PGA, 84-pin PLCC and 100-pin TQFP
` Industrial temperature range

Pinout

Specifications

Symbol	Rating	Commercial &Industrial	Unit
VTERM(2)	Terminal Voltage with Respect to GND	-0.5 to +4.6	V
TBIAS	Temperature Under Bias	-55 to +125	oC
TSTG	Storage Temperature	-55 to +125	oC
IOUT	DC Output Current	50	mA

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.3V for more than 25% of the cycle time or 10ns maximum, and
is limited to < 20mA for the period of VTERM > Vcc + 0.3V.


Description

The IDT70V25L is a high-speed 8K x 16 Dual-Port Static RAM. The IDT70V25L is designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.
 
This IDT70V25L provides two independent ports with separate control,address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.

Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 400mW of power.

The IDT70V25L is packaged in a ceramic 84-pin PGA, an 84-Pin PLCC and a 100-pin Thin Quad Flatpack.