IDT70T16

Features: M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave Busy and Interrupt Flag On-chip port arbitration logicFull on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 2.5V (±100mV) power...

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SeekIC No. : 004372074 Detail

IDT70T16: Features: M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave Busy and Interrupt Flag On-chip port arbitration logicFull on-chip hardware support of semaphore signaling betwe...

floor Price/Ceiling Price

Part Number:
IDT70T16
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/28

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Product Details

Description



Features:

  M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave
  Busy and Interrupt Flag
  On-chip port arbitration logic
 Full on-chip hardware support of semaphore signaling between ports
  Fully asynchronous operation from either port
  LVTTL-compatible, single 2.5V (±100mV) power supply
  Available in an 80-pin TQFP and 100-pin fpBGA
  Industrial temperature range (40°C to +85°C) is availablefor selected speeds
  True Dual-Ported memory cells which allow simultaneous reads of the same memory location
  High-speed access
Commercial:20/25ns (max.)
Industrial: 25ns (max.)
 Low-power operation
IDT70T16/5L
Active: 200mW (typ.)
Standby: 600 µW (typ.)
  IDT70T16/5 easily expands data bus width to 18 bits or
more using the Master/Slave select when cascading more than one device



Pinout

  Connection Diagram
NOTES:
1. A13 is a NC for IDT70T15.
2. All VDD pins must be connected to power supply.
3. All VSS pins must be connected to ground supply.
4. Package body is approximately 1.18 in x 1.18 in x 0.16 in.
5. This package code is used to reference the package diagram.
6. This text does not imply orientation of Part-marking.



Specifications

Symbol
Rating
Commercial
& Industrial
Unit
VTERM
Terminal Voltage
with respect to GND
-0.5 to +7.0
V
VTER(2)
Terminal Voltage
-55 to +125
°C
TSTG
Temperature
Under Bias
-65 to +150
o C
IOUT
DC Output Current
50
mA
TJN
J unc tio n Te m p e rature
+ 150
o C

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed VDD+ 0.3V.
3. Ambient Temperature Under Bias. No AC Conditions. Chip Deselected.




Description

The IDT70T16/5 is a high-speed 16/8K x 9 Dual-Port Static RAM. The IDT70T16/5 is designed to be used as stand-alone Dual-Port RAMs or as a combination MASTER/SLAVE Dual-Port RAM for 18-bit-or-more wider systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.

This IDT70T16 provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 200mW of power.

The IDT70T16/5 is packaged in an 80-pinTQFP (Thin Quad Flatpack) and a 100-pin fpBGA (fine pitch Ball Grid array) .




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