Features: M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port TTL-compatible, single 5V (±10%) power supply Availa...
IDT7019L: Features: M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between port...
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Symbol |
Rating |
Com'l & Ind'l
|
Unit |
Military |
VTERM |
Terminal Voltage with respect to GND |
0.5 to +4.5 |
V |
-0.5 to +7.0 |
TSTG |
Temperature Under Bias |
55 to +125 |
°C |
-65 to +135 |
TSTG |
Storage Temperature |
-65 to +150
|
mA |
-65 to +150 |
IOUT |
DC Output Current |
50
|
mA |
50 |
The IDT7019L is a high-speed 128K x 9 Dual-Port Static RAM. The IDT7019 is designed to be used as a stand-alone 1152K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 18-bit-ormore word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit or wider memory system applications results in fullspeed, error-free operation without the need for additional discrete logic.
This IDT7019L provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (CE0 and CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only1W of power. The IDT7019L is packaged in a 100-pin Thin Quad Flatpack (TQFP).