Features: • High-speed access Commercial: 25/35/45/55ns (max.)• Low-power operation IDT70121/70125S Active: 500mW (typ.) Standby: 5mW (typ.) IDT70121/70125L Active: 500mW (typ.) Standby: 1mW (typ.)• Fully asychronous operation from either port• MASTER IDT70121 easily exp...
IDT70121S: Features: • High-speed access Commercial: 25/35/45/55ns (max.)• Low-power operation IDT70121/70125S Active: 500mW (typ.) Standby: 5mW (typ.) IDT70121/70125L Active: 500mW (typ.) Stand...
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Symbol | Rating |
Commercial & Industrial |
Unit |
VTERM(2) | Terminal Voltage with Respect to GND |
0.5 to +7.0 |
V |
TBIAS | Temperature Under Bias |
0 to +70 |
|
TSTG | Storage Temperature |
55 to +125 |
|
IOUT | DC Output Current |
50 |
mA |
The IDT70121S are high-speed 2K x 9 Dual-Port Static RAMs. The IDT70121S is designed to be used as a stand-alone 9-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the IDT70125 "SLAVE" Dual-Port in 18-bit-or-more word width systems. Using the IDT MASTER/ SLAVE Dual-Port RAM approach in 18-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.
Both devices provide two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory.An automatic power-down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode.
The IDT70121S utilizes a 9-bit wide data path to allow for Data/Control and parity bits at the user's option. This feature is especially useful in data communications applications where it is necessary to use a parity bit for transmission/reception error checking.
Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 500mW of power. Low-power (L) versions offer battery backup data retention capability with each port typically consuming 200mW
from a 2V battery.
The IDT70121S devices are packaged in a 52-pin PLCC.