IDT54FCT821BT

Features: • Common features: Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility VOH = 3.3V (typ.) VOL = 0.3V (typ.) Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Mi...

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IDT54FCT821BT Picture
SeekIC No. : 004371814 Detail

IDT54FCT821BT: Features: • Common features: Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility VOH = 3.3V (typ.) VOL = 0.3V (typ.) Meets or exceeds JEDEC sta...

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Part Number:
IDT54FCT821BT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• Common features:
   Low input and output leakage 1A (max.)
   CMOS power levels
   True TTL input and output compatibility
    VOH = 3.3V (typ.)
    VOL = 0.3V (typ.)
   Meets or exceeds JEDEC standard 18 specifications
   Product available in Radiation Tolerant and Radiation Enhanced versions
   Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked)
   Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages
• Features for FCT821T/FCT823T/FCT825T:
   A, B, C and D speed grades
   High drive outputs (-15mA IOH, 48mA IOL)
   Power off disable outputs permit "live insertion"



Pinout

  Connection Diagram


Specifications

Symbol Rating Commercial Military Unit
VTERM Terminal Voltage
with Respect to
GND
0.5 to +7.0 0.5 to +7.0 V
VTERM Terminal Voltage
with Respect to
GND
-0.5 to VCC +0.5 0.5 to VCC +0.5 V
TA Operating
Temperature
0 to +70 55 to +125 °C
TBIAS Temperature
Under Bias
55 to +125 65 to +135 °C
TSTG
Storage
Temperature
55 to +125 65 to +150 °C
PT Power Dissipation 0.5 0.5 W
IOUT
DC Output
Current
60 to +120 60 to +120 mA



Description

The IDT54FCT821BT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The FCT821T are buffered, 10-bit wide versions of the popular IDT54FCT821BT function. The IDT54FCT821BT are 9-bit wide buffered registers with Clock Enable ( EN) and Clear ( CLR) ideal for parity bus interfacing in high-performance microprogrammed systems.

The IDT54FCT821BT are 8-bit buffered registers with all the IDT54FCT821BT controls plus multiple enables ( OE1, OE2, OE3) to allow multiuser control of the interface, e.g., CS, DMA and RD/ WR. They are ideal for use as an output port requiring high IOL/IOH.The FCT82xT high-performance interface family can drive large capacitive loads, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes and all outputs are designed for low-capacitance bus loading in high-impedance state.




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