IDT5474FCT138T/

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.

The IDT5474FCT138T/ is a 1-of-8 decoder built using an advanced dual metal CMOS technology. The IDT54/74FCT138T accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active low outputs (O0 - O7). The IDT54/74FCT138T features three enable inputs, two active low (E1, E2) and one active high (E3). All outputs of the IDT5474FCT138T/ will be high unless E1 and E2 are low and E3 is high. This multiple enable function allows easy parallel expansion of the device to 1-of-32 (5 lines to 32 lines) decoder with just four IDT54/74FCT138T devices and one inverter.